Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Sharing a second tier cache memory in a multi-processor

Sharing a second tier cache memory in a multi-processor

US Patent 6880049 · Granted Apr 12, 2005

Estimated economic value: $99,347,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Dynamic reconfiguration of a multi-core processor to a unified core2025
Network router having service card2022
Network router having service card2020
Reliability enhancement utilizing speculative execution systems and methods2019
Software methods in a GPU2017
System and method for parsing and allocating a plurality of packets to processor2017
Error detection and correction for external DRAM2016
System, method, and computer program product for conditionally sending a request2016
Programmable micro-core processors for packet parsing2016
Methods and apparatus to implement except condition during data packet classific2016
Method and apparatus for implementing cache coherency of a processor2016
Programmable micro-core processors for packet parsing with packet ordering2016