{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Process-robust alignment mark structure for semiconductor wafers", "item": "https://www.patentleaderboard.com/patent/6803668"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Process-robust alignment mark structure for semiconductor wafers

Process-robust alignment mark structure for semiconductor wafers

US Patent 6803668 · Granted Oct 12, 2004

Estimated economic value: $7,244,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Toothbrush head2025
Toothbrush head2025
Buffer release for inter-satellite link transition2025
Layer 1 measurement reporting using measurement index2025
User equipment processing capability indication2025
Discontinuous reception for configured grant/semi-persistent scheduling2025
Communication timing for sidelink relay between a ground UE and an aerial device2025
Sofa, chair and table set2025
Methods and apparatus to facilitate access link and ATG-based message relaying2025
Reported mobile device location assessment2025
Coal mining system and method of dual circulation drilling with mechanical reami2025
Techniques for intelligent reflecting surface (IRS) position determination in IR2025