Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for implementing a single-syllable IP-relative branch instruction and a long IP-relative branch instruction in a processor which fetches instructions in bundle form

Method and apparatus for implementing a single-syllable IP-relative branch instruction and a long IP-relative branch instruction in a processor which fetches instructions in bundle form

US Patent 6721875 · Granted Apr 13, 2004

Estimated economic value: $18,783,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Shared memory mesh for switching2023
Asset protection of integrated circuits during transport2020
Boot process with parallel memory initialization2019
Speculative cache modification2019
Shared mesh2019
Asset protection of integrated circuits during transport2018
System and method for out-of-order prefetch instructions in an in-order pipeline2016
Mesh performance improvement using dual voltage data transfer2016
Speculative cache modification2015
Run-time updating of prediction hint instructions2013
Computer system resource access control2011
Acquiring instruction addresses associated with performance monitoring events2010