Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Asynchronous bist for embedded multiport memories

Asynchronous bist for embedded multiport memories

US Patent 6671842 · Granted Dec 30, 2003

Estimated economic value: $3,819,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Hard BISR scheme allowing field repair and usage of reliability controller2009
Testing implementation suitable for built-in self-repair (BISR) memories2007
Detecting faults in dual port FIFO memories2004
Parallel testing of a multiport memory2004
Parallel testing of a multiport memory2004
Built-in self repair circuitry utilizing permanent record of defects2003
Decoding circuit for memories with redundancy2003
Use of a scan chain for configuration of BIST unit operation2003
Use of a scan chain for configuration of BIST unit operation2003
Detecting interport faults in multiport static memories2003
Multi-condition BISR test mode for memories with redundancy2003
Testing content addressable static memories2002