Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multi-port cache memory devices and FIFO memory devices having multi-port cache memory devices therein

Multi-port cache memory devices and FIFO memory devices having multi-port cache memory devices therein

US Patent 6546461 · Granted Apr 8, 2003

Estimated economic value: $14,796,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Recycled thermoplastic polyurethane mixed leather and manufacturing method there2024
Methods, systems, articles of manufacture and apparatus to detect process hijack2022
Teaching material generation methods and systems2014
Multi-queue address generator for start and end addresses in a multi-queue first2012
Serial buffer supporting virtual queue to physical memory mapping2011
Multiple counters to relieve flag restriction in a multi-queue first-in first-ou2011
Multi-function queue to support data offload, protocol translation and pass-thro2010
Partial packet write and write data filtering in a multi-queue first-in first-ou2010
Output drive circuit that accommodates variable supply voltages2009
High-speed, low-power level shifter for mixed signal-level environments2009
Mark/re-read and mark/re-write operations in a multi-queue first-in first-out me2009
Multi-queue FIFO memory devices that support a backed-off standard mode of opera2008