Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Dual tristate path output buffer control

Dual tristate path output buffer control

US Patent 6538485 · Granted Mar 25, 2003

Estimated economic value: $3,127,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Power on reset circuits2006
Verification of integrated circuit designs using buffer control2005
Dual tristate path output buffer control2004
Wired address compare circuit and method2002
Wordline and pseudo read stress test for SRAM2002
Direct bit line-bit line defect detection test mode for SRAM2002
Wired address compare circuit and method2001
Scan path circuitry including a programmable delay circuit2001
Scan path circuitry for programming a variable clock pulse width2000
Test mode features for synchronous pipelined memories1999
Scan path circuitry including an output register having a flow through mode1999
Scan path circuitry including a programmable delay circuit1999