Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Superscalar processor and method for incrementally issuing store instructions

Superscalar processor and method for incrementally issuing store instructions

US Patent 6463524 · Granted Oct 8, 2002

Estimated economic value: $10,352,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Equalizer bearing assembly having wedged retainers2025
Lightweight, lattice structure horsehead for reciprocating pump unit2025
Routing instruction results to a register block of a subdivided register file ba2025
Parallel slice processor having a recirculating load-store queue for fast deallo2024
Parallel slice processor having a recirculating load-store queue for fast deallo2024
Assignment of microprocessor register tags at issue time2024
Fast mapper restore for flush in processor2024
Loosely-coupled slice target file data2024
Dependency skipping in a load-compare-jump sequence of instructions by incorpora2024
Inferring future value for speculative branch resolution in a microprocessor2024
Compaction of architected registers in a simultaneous multithreading processor2023
Instruction handling for accumulation of register results in a microprocessor2023