Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Physical rename register for efficiently storing floating point, integer, condition code, and multimedia values

Physical rename register for efficiently storing floating point, integer, condition code, and multimedia values

US Patent 6266763 · Granted Jul 24, 2001

Estimated economic value: $3,903,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Microprocessor with non-cacheable memory load prediction2024
Combined transparent/non-transparent cache2020
Combined transparent/non-transparent cache2019
Zero cycle move2017
Combined transparent/non-transparent cache2016
Optimizing register initialization operations2016
Instruction set architecture mode dependent sub-size access of register with ass2016
Combined transparent/non-transparent cache2016
Processing multi-destination instruction in pipeline by splitting for single des2015
Branch predictor for wide issue, arbitrarily aligned fetch that can cross cache 2015
Combined transparent/non-transparent cache2015
Bandwidth management2014