Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for processing multiple cache misses using reload folding and store merging

Method and apparatus for processing multiple cache misses using reload folding and store merging

US Patent 5809530 · Granted Sep 15, 1998

Estimated economic value: $7,478,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multi-die processor2014
Sleep state mechanism for virtual multithreading2014
Methods and apparatus to monitor instruction types and control power consumption2012
Virtual multithreading translation mechanism including retrofit capability2010
System for forming a critical update loop to continuously reload active thread s2010
Fusing load and alu operations2008
Dual-target block register allocation2007
Methods and apparatus to control functional blocks within a processor2007
Updating stack pointer based on instruction bit indicator without executing an u2006
Intra-instruction fusion2006
Pipelined, superscalar floating point unit having out-of-order execution capabil2005
Method and apparatus for fast dependency coordinate matching2005