Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Macrocell architecture with high speed product terms

Macrocell architecture with high speed product terms

US Patent 5610536 · Granted Mar 11, 1997

Estimated economic value: $15,032,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Clock enable control circuit for flip flops2002
Clock enable control circuit for flip flops2002
Overridable data protection mechanism for PLDs1999
Overridable data protection mechanism for PLDs1999
Two transistor flash EEprom cell and method of operating same1999
Overridable data protection mechanism for PLDs1998
Overridable data protection mechanism for PLDs1998
Fast signal path for programmable logic device1998
Reset circuit for a programmable logic device1997
High speed product term assignment for output enable, clock, inversion and set/r1997
High speed product term assignment for output enable, clock, inversion and set/r1997
Programmable logic device with configurable power supply1997