Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Fast word line decoder for memory devices

Fast word line decoder for memory devices

US Patent 5604712 · Granted Feb 18, 1997

Estimated economic value: $28,728,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Content addressable memory continuous error detection with interleave parity2014
Content addressable memory data clustering block architecture2014
Segmented memory having power-saving mode2014
Low power SRAM based content addressable memory2012
High speed single ended bit line sense amplifier1998
High speed method and apparatus for detecting assertion of multiple signals1998
Method and apparatus for detecting assertion of multiple signals1997
Fast memory sense system1997
Method and apparatus for a low power self-timed memory control system1997
Integrated circuit interconnections testing1991
Register circuit for transmitting and receiving serial data1987