Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of manufacturing integrated circuits having electronic components of two different types each having pairs of electrodes obtained from the same polycrystalline silicon layers and separated by different dielectric materials

Method of manufacturing integrated circuits having electronic components of two different types each having pairs of electrodes obtained from the same polycrystalline silicon layers and separated by different dielectric materials

US Patent 5075246 · Granted Dec 24, 1991

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Integrating diverse transistors on the same wafer2013
Process for manufacturing a memory device integrated on a semiconductor substrat2011
Sealing method for electronic devices formed on a common semiconductor substrate2008
Manufacturing method for non-active electrically structures in order to optimize2008
Analysis of the quality of contacts and vias in multi-metal fabrication processe2007
Sealing method for electronic devices formed on a common semiconductor substrate2006
Manufacturing method for non-active electrically structures in order to optimize2006
Electrically erasable and programmable non-volatile memory cell2005
Process for integrating in a same chip a non-volatile memory and a high-performa2004
Method of forming low-resistivity connections in non-volatile memories2004
Method of manufacturing an integrated circuit, for integrating an electrically p2003
EEPROM type non-volatile memory cell and corresponding production method2003