Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Semiconductor memory circuit having dummy cells connected to twisted bit lines

Semiconductor memory circuit having dummy cells connected to twisted bit lines

US Patent 5001669 · Granted Mar 19, 1991

Estimated economic value: $7,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Level adjustment circuit and data output circuit thereof2003
Level adjustment circuit and data output circuit thereof2002
Semiconductor memory device having redundant circuit2002
Bias circuit for providing a stable output current1996
Bootstrapped high-speed output buffer1994
Semiconductor memory device1994
Low-power decoder for selecting redundant memory cells1994
Semiconductor memory circuit1994
Semiconductor memory with improved sense amplifier layout1993
Semiconductor memory device1993
Random access memory including word line clamping circuits1992
Sense amplifier circuitry selectively separable from bit lines for dynamic rando1992