Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › CMOS process for fabricating integrated circuits, particularly dynamic memory cells with storage capacitors

CMOS process for fabricating integrated circuits, particularly dynamic memory cells with storage capacitors

US Patent 4536947 · Granted Aug 27, 1985

Estimated economic value: $26,681,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Hyperchip2025
Semiconductor device having tipless epitaxial source/drain regions2025
Gate contact structure over active gate and method to fabricate same2025
Self-aligned contacts2025
Uniform layouts for SRAM and register file bit cells2024
Gate-all-around integrated circuit structures having source or drain structures 2024
Deep trench via for three-dimensional integrated circuit2024
Hyperchip2024
Multi version library cell handling and integrated circuit structures fabricated2024
Integrated circuit device with crenellated metal trace layout2024
Hyperchip2024
Package on active silicon semiconductor packages2024