Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Means for enhancing logic circuit performance

Means for enhancing logic circuit performance

US Patent 4529894 · Granted Jul 16, 1985

Estimated economic value: $47,097,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Power saving scannable latch output driver2021
Dynamic decode circuit with active glitch control2019
Dynamic decode circuit with active glitch control method2019
Dynamic decode circuit with active glitch control method2019
Dynamic decode circuit with delayed precharge2019
Dynamic decode circuit with active glitch control2019
Dual mode operation having power saving and active modes in a stacked circuit to2018
Dynamic decode circuit with active glitch control2018
Automated stressing and testing of semiconductor memory cells2017
Automated stressing and testing of semiconductor memory cells2017
Managing semiconductor memory array leakage current2017
Dual mode operation having power saving and active modes in a stacked circuit to2017