Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Pitch translation architecture for semiconductor package including embedded interconnect bridge

Pitch translation architecture for semiconductor package including embedded interconnect bridge

US Patent 12388019 · Granted Aug 12, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Flexible die to floor planning with bump pitch scale through glass core via pitc2025
Ultra-thin, hyper-density semiconductor packages2025
Disaggregated die with input/output (I/O) tiles2025
Nested glass packaging architecture for hybrid electrical and optical communicat2025
Ultra-thin, hyper-density semiconductor packages2025
Photonic integrated circuit packaging architectures2025
Integrated circuit package with flipped high bandwidth memory device2025
Microelectronic assemblies with direct attach to circuit boards2025
Interconnect architecture with silicon interposer and EMIB2025
Microelectronic structures including glass cores2025
IC die and heat spreaders with solderable thermal interface structures for multi2025
Heterogeneous nested interposer package for IC chips2025