Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multiplier and adder in systolic array

Multiplier and adder in systolic array

US Patent 12197890 · Granted Jan 14, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Neural network accelerator in DIMM form factor2025
Neural network accelerator in DIMM form factor2025
Accelerated embedding layer computations2025
Error checking for systolic array computation2025
Accelerated embedding layer computations2024
Modifying machine learning models to improve locality2024
Error checking for systolic array computation2023
Accelerated embedding layer computations2023
Error checking for systolic array computation2022
Modifying machine learning models to improve locality2022
Graph-based online image queries2021
Efficient property graph storage for streaming/multi-versioning graphs2021