Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Hardware micro-fused memory operations

Hardware micro-fused memory operations

US Patent 12175243 · Granted Dec 24, 2024

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Mechanism for instruction fusion2025
Performing instruction fetch pipeline synchronization (IFPS) in processor-based 2025
Apparatus, system, and method for multi-level instruction scheduling in a microp2024
Instruction scheduling in a processor using operation source parent tracking2024
Instruction scheduling in a processor using operation source parent tracking2024
Rotate instructions that complete execution either without writing or reading fl2024
Flexible storage and optimized search for multiple page sizes in a translation l2023
Method, apparatus, and system for run-time checking of memory tags in a processo2023
Instruction and logic for processing text strings2022
Addition instructions with independent carry chains2022
Distributing a global counter value in a multi-socket system-on-chip complex2022
Flexible storage and optimized search for multiple page sizes in a translation l2022