Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Machine instructions for decoding acceleration including fuse input instructions to fuse multiple JPEG data blocks together to take advantage of a full SIMD width of a processor

Machine instructions for decoding acceleration including fuse input instructions to fuse multiple JPEG data blocks together to take advantage of a full SIMD width of a processor

US Patent 11941397 · Granted Mar 26, 2024

Estimated economic value: $296,589,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Reducing power consumption in integrated circuits2025
Systolic array with input reduction to multiple reduced inputs2025
Flexible array data loading2025
Configuration of a deep vector engine using an opcode table, control table, and 2025
Throughput increase for compute engine2025
Configurable vector compute engine2025
Increasing performance of computational array accelerators2024
Fine-grained sparsity computations in systolic array2024
Matrix transpose hardware acceleration2024
Emulating fine-grained sparsity in a systolic array2024
Throughput increase for tensor operations2024
Throughput increase for tensor operations2024