Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Low power flip-flop with balanced clock-to-Q delay

Low power flip-flop with balanced clock-to-Q delay

US Patent 11139803 · Granted Oct 5, 2021

Estimated economic value: $251,870,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Clock-free serialization of asynchronous signals2025
Performing multiple bit computation and convolution in memory2025
Memory bit cell for in-memory computation2025
Power loss reduction in data storage arrays2025
Power loss reduction in data storage arrays2025
Performing multiple bit computation and convolution in memory2024
Hybrid pulse/two-stage data latch2024
Hybrid pulse/two-stage data latch2024
Power down detection for non-destructive isolation signal generation2023
Power down detection for non-destructive isolation signal generation2023
Flip-flop circuit with glitch protection2022
Flip-flop circuit with glitch protection2022