Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Inner spacer and junction formation for integrating extended-gate and standard-gate nanosheet transistors

Inner spacer and junction formation for integrating extended-gate and standard-gate nanosheet transistors

US Patent 11062959 · Granted Jul 13, 2021

Estimated economic value: $4,436,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Vertically stacked FET with strained channel2025
Nanowire source/drain formation for nanosheet device2025
Strain generation and anchoring in gate-all-around field effect transistors2025
Buried power rail with robust connection to a wrap around contact2025
Semiconductor structure with wrapped-around backside contact2025
TopVia interconnect with enlarged via top2025
Two-dimensional vertical fins2025
Gain cell memory based physically unclonable function2025
SRAM macro design architecture2025
Stacked SRAM cell architecture2025
Air gap spacer for metal gates2025
Stacked cross-point phase change memory2025