Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and system for coordinating baseline and secondary prefetchers

Method and system for coordinating baseline and secondary prefetchers

US Patent 10678692 · Granted Jun 9, 2020

Estimated economic value: $37,008,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Random swap injection2025
3D stack of split graphics processing logic dies2025
System, method, and apparatus for enhanced pointer identification and prefetchin2025
Ferroelectric memory chiplet in a multi-dimensional packaging with I/O switch em2024
Ferroelectric memory chiplet in a multi-dimensional packaging2024
Method and apparatus for heuristic-based power gating of non-CMOS logic and CMOS2024
Method and apparatus for managing power in a multi-dimensional packaging2024
Method and apparatus for managing power of ferroelectric or paraelectric logic a2024
Method and apparatus to process an instruction for a distributed logic having ti2024
Branch prediction based on coherence operations in processors2024
Apparatus and method for endurance of non-volatile memory banks via wear levelin2024
Apparatus and method for endurance of non-volatile memory banks via wear levelin2024