Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › DRAM bank activation management

DRAM bank activation management

US Patent 10572168 · Granted Feb 25, 2020

Estimated economic value: $1,919,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Effective DRAM interleaving for asymmetric size channels or ranks while supporti2025
Effective DRAM interleaving for asymmetric size channels or ranks while supporti2023
Host synchronized autonomous data chip address sequencer for a distributed buffe2023
Address/command chip controlled data chip address sequencing for a distributed m2023
Refresh-hiding memory system staggered refresh2022
Address/command chip synchronized autonomous data chip address sequencer for a d2022
Reduced system memory latency via a variable latency interface2022
Mapping memory allocation requests using various memory attributes2022
Speculative bank activate dynamic random access memory (DRAM) scheduler2022
Information handling system with immediate scheduling of load operations2021
Method and system to improve read reliability in memory devices2021
DRAM bank activation management2021