DP

Dharmesh Parikh

IBM: 5 patents #18,733 of 70,183Top 30%
CI Cisco: 3 patents #4,210 of 13,007Top 35%
QU Qualcomm: 2 patents #5,578 of 12,104Top 50%
Overall (All Time): #481,938 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12298903 Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refresh Kunal Desai, Saurabh Jaiswal, Vikrant Kumar, Swaraj Sha 2025-05-13
11749332 Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refresh Kunal Desai, Saurabh Jaiswal, Vikrant Kumar, Swaraj Sha 2023-09-05
11042312 DRAM bank activation management Stephen J. Powell, Venkata K. Tavva 2021-06-22
10572168 DRAM bank activation management Stephen J. Powell, Venkata K. Tavva 2020-02-25
10380040 Memory request scheduling to improve bank group utilization Venkata K. Tavva, Stephen J. Powell 2019-08-13
9703711 Managing cache coherence for memory caches Gopikrishnan Viswanadhan 2017-07-11
9703710 Managing cache coherence for memory caches Gopikrishnan Viswanadhan 2017-07-11
8612295 Method and apparatus for processing order related messages Arvind Gidwani, Subramanian Srinivasan 2013-12-17
8019647 Methods, apparatus and computer readable medium for processing order related messages Arvind Gidwani, Subramanian Srinivasan 2011-09-13
7203658 Methods and apparatus for processing order related messages Arvind Gidwani, Subramanian Srinivasan 2007-04-10