Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12298903 | Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refresh | Kunal Desai, Saurabh Jaiswal, Swaraj Sha, Dharmesh Parikh | 2025-05-13 |
| 11749332 | Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refresh | Kunal Desai, Saurabh Jaiswal, Swaraj Sha, Dharmesh Parikh | 2023-09-05 |
| 11494120 | Adaptive memory transaction scheduling | Karthik Chandrasekar | 2022-11-08 |