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Home › Redundant storage of error correction code (ECC) checkbits for validating proper operation of a static random access memory (SRAM)

Redundant storage of error correction code (ECC) checkbits for validating proper operation of a static random access memory (SRAM)

US Patent 10528422 · Granted Jan 7, 2020

Estimated economic value: $9,394,000 ⓘ

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