Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Vertical transistor including controlled gate length and a self-aligned junction

Vertical transistor including controlled gate length and a self-aligned junction

US Patent 10388795 · Granted Aug 20, 2019

Estimated economic value: $1,949,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Vertically stacked FET with strained channel2025
Nanowire source/drain formation for nanosheet device2025
Strain generation and anchoring in gate-all-around field effect transistors2025
Buried power rail with robust connection to a wrap around contact2025
Semiconductor structure with wrapped-around backside contact2025
Two-dimensional vertical fins2025
Gain cell memory based physically unclonable function2025
Air gap spacer for metal gates2025
Stacked cross-point phase change memory2025
Method to release nano sheet after nano sheet fin recess2025
Work function metal patterning for nanosheet CFETs2025
Circuit architecture using transistors with dynamic dual functionality for logic2025