Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Pulsed control line biasing in memory

Pulsed control line biasing in memory

US Patent 10217520 · Granted Feb 26, 2019

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Single-level cell pump skip program operation preliminary period timing optimiza2025
Dual-way sensing scheme for better neighboring word-line interference2025
Open block read ICC reduction2025
Dynamic 1-tier scan for high performance 3D NAND2025
High performance verify techniques in a memory device2025
Non-volatile memory with erase depth detection and adaptive adjustment to progra2025
Active current consumption save mode for non-volatile memory using fast programm2025
Apparatus and method for detecting neighbor plane erase failures2025
Data retention-specific refresh read2025
Data retention-specific refresh read2025
Three-bit-per-cell programming using a four-bit-per-cell programming algorithm2025
CELSRC voltage separation between SLC and XLC for SLC program average ICC reduct2025