Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › FinFET devices including recessed source/drain regions having optimized depths

FinFET devices including recessed source/drain regions having optimized depths

US Patent 10147793 · Granted Dec 4, 2018

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Ultra pipelined accelerator for machine learning inference2025
High-density neuromorphic computing element2025
High-density neuromorphic computing element2025
Monolithic multi-bit weight cell for neuromorphic computing2025
Monolithic multi-bit weight cell for neuromorphic computing2025
Monolithic multi-bit weight cell for neuromorphic computing2025
Integrated circuit with buried power rail and methods of manufacturing the same2025
Semiconductor cell blocks having non-integer multiple of cell heights2024
High-density neuromorphic computing element2024
High-density neuromorphic computing element2024
Method of enabling sparse neural networks on memresistive accelerators2023
Method of enabling sparse neural networks on memresistive accelerators2023