Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8735184 | Equalization in proximity communication | Ronald Ho, Robert D. Hopkins, Robert J. Drost | 2014-05-27 |
| 8222924 | Asynchronous FIFO circuit for long-distance on-chip communication | Robert J. Drost, Josephus C. Ebergen | 2012-07-17 |
| 8130821 | Equalization in capacitively coupled communication links | Robert D. Hopkins, Ronald Ho, Robert J. Drost | 2012-03-06 |
| 8102020 | Equalization in proximity communication | Ronald Ho, Robert D. Hopkins, Robert J. Drost | 2012-01-24 |
| 8023555 | Repeater circuit | Scott M. Fairbanks | 2011-09-20 |
| 7994501 | Method and apparatus for electronically aligning capacitively coupled mini-bars | Robert J. Drost, Ivan E. Sutherland | 2011-08-09 |
| 7701254 | Reconfigurable circuits | Alex Chow, Robert D. Hopkins | 2010-04-20 |
| 7384804 | Method and apparatus for electronically aligning capacitively coupled mini-bars | Robert J. Drost, Ivan E. Sutherland | 2008-06-10 |
| 7369726 | Optical communication between face-to-face semiconductor chips | Robert J. Drost | 2008-05-06 |
| 7296176 | Method and apparatus for limiting the number of asynchronous events that occur during a clock cycle | Jo C. Ebergen, Robert J. Drost, Ian W. Jones | 2007-11-13 |
| 7256628 | Speed-matching control method and circuit | Robert J. Drost, Josephus C. Ebergen | 2007-08-14 |
| 6741616 | Switch fabric for asynchronously transferring data within a circuit | Ivan E. Sutherland, Ian W. Jones | 2004-05-25 |
| 6694389 | Method and apparatus for data flow analysis | Mark R. Greenstreet | 2004-02-17 |
| 6600325 | Method and apparatus for probing an integrated circuit through capacitive coupling | Robert J. Bosnyak, Ivan E. Sutherland | 2003-07-29 |
| 6360288 | Method and modules for control of pipelines carrying data using pipelines carrying control signals | Ivan E. Sutherland, Charles E. Molnar, Robert F. Sproull | 2002-03-19 |
| 6169422 | Apparatus and methods for high throughput self-timed domino circuits | David L. Harris | 2001-01-02 |
| 6085316 | Layered counterflow pipeline processor with anticipatory control | Ivan E. Sutherland, Charles E. Molnar, Ian W. Jones, Jon Lexau | 2000-07-04 |
| 6065109 | Arbitration logic using a four-phase signaling protocol for control of a counterflow pipeline processor | — | 2000-05-16 |
| 5955898 | Selector and decision wait using pass gate XOR | Ivan E. Sutherland, Jon Lexau | 1999-09-21 |
| 5943491 | Control circuit of mutual exclusion elements | Ivan E. Sutherland, Robert F. Sproull | 1999-08-24 |