Issued Patents All Time
Showing 26–40 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5991854 | Circuit and method for address translation, using update and flush control circuits | — | 1999-11-23 |
| 5983332 | Asynchronous transfer mode (ATM) segmentation and reassembly unit virtual address translation unit architecture | — | 1999-11-09 |
| 5937436 | Network interface circuit including an address translation unit and flush control circuit and method for checking for invalid address translations | — | 1999-08-10 |
| 5854911 | Data buffer prefetch apparatus and method | — | 1998-12-29 |
| 5845325 | Virtual address write back cache with address reassignment and cache block flush | William Loo, Robert B. Garner, William N. Joy, Joseph P. Moran, III, William Shannon +1 more | 1998-12-01 |
| 5832302 | Dual adder burst control governor to signal when a data burst is close to completion | — | 1998-11-03 |
| 5828872 | Implementation of high speed synchronous state machines with short setup and hold time signals | — | 1998-10-27 |
| 5793993 | Method for transmitting bus commands and data over two wires of a serial bus | Walter F. Broedner, Anthony M. Faddell, Stephen G. Perlman | 1998-08-11 |
| 5675811 | Method for transmitting information over an intelligent low power serial bus | Walter F. Broedner, Anthony M. Fadell, Stephen G. Perlman | 1997-10-07 |
| 5448913 | Adjustable measuring device | Rodney W. Robbins, E. Stanley Robbins, Frans M. Wetterings, Charles R. Hebner | 1995-09-12 |
| 5325717 | Adjustable measuring device | Rodney W. Robbins, E. Stanley Robbins, Frans M. Weterrings, Charles R. Hebner | 1994-07-05 |
| 5263142 | Input/output cache with mapped pages allocated for caching direct (virtual) memory access input/output data based on type of I/O devices | David Labuda, William C. Van Loo | 1993-11-16 |
| 5247648 | Maintaining data coherency between a central cache, an I/O cache and a memory | David Labuda, William C. Van Loo | 1993-09-21 |
| 5161162 | Method and apparatus for system bus testability through loopback | William C. Van Loo, Kurt Michels, Hugh Chang | 1992-11-03 |
| 5119290 | Alias address support | William Loo, Joseph P. Moran, III, William Shannon, Ray-Guang Cheng | 1992-06-02 |