JS

Jeannette Sutherland

Oracle: 2 patents #5,522 of 14,854Top 40%
CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
Overall (All Time): #1,509,502 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9405882 High performance static timing analysis system and method for input/output interfaces Amit Dhuria, Naresh Kumar, Prashant Sethia, Shashank Tripathi 2016-08-02
7216316 Method for evaluating nets in crosstalk noise analysis Robert E. Mains, Matthew J. Amatangelo, Shervin Hojat 2007-05-08
7206958 Determining cycle adjustments for static timing analysis of multifrequency circuits Robert E. Mains, Matthew J. Amatangelo 2007-04-17