{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Oracle", "item": "https://www.patentleaderboard.com/company/oracle"}, {"@type": "ListItem", "position": 3, "name": "Daniel S. Nussbaum", "item": "https://www.patentleaderboard.com/inventor/fl:da_ln:nussbaum-3"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
DN

Daniel S. Nussbaum — 17 Patents

Oracle: 15 patents #690 of 14,854Top 5%
QCQuanta Computer: 1 patents #690 of 1,295Top 55%
Amazon: 1 patents #10,717 of 19,158Top 60%
Cambridge, MA: #614 of 8,183 inventorsTop 8%
Massachusetts: #7,047 of 88,656 inventorsTop 8%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Daniel S. Nussbaum has been granted 17 US patents while listed as an inventor at Oracle. The first was granted in 2008 and the most recent in November 2018. Daniel S. Nussbaum ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Daniel S. Nussbaum in Cambridge, MA, US.

Patents per Year

Patents granted per year, 2008 to 2018Bar chart with a peak of 5 patents in 2013.peak 52008: 2 patents20082009: 1 patents20092010: 1 patents20102011: 2 patents20112012: 4 patents20122013: 5 patents20132016: 1 patents20162018: 1 patents2018

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10140312 Low latency distributed storage service Jacob A. Strauss, Mark Allen Fogleman, Edward William Naim, Jacob David Luszcz, Michael Robert Frasca +5 more 2018-11-27 $117,896,000
9374588 Rate control method and system Matteo Frigo 2016-06-21
8560816 System and method for performing incremental register checkpointing in transactional memory Mark S. Moir, David Dice, James R. Goodman 2013-10-15 $50,780,000
8539491 Thread scheduling in chip multithreading processors Christopher A. Small, Alexandra Fedorova 2013-09-17 $61,969,000
8490101 Thread scheduling in chip multithreading processors Christopher A. Small, Alexandra Fedorova 2013-07-16 $56,915,000
8464261 System and method for executing a transaction using parallel co-transactions Mark S. Moir, Robert E. Cypher 2013-06-11 $30,242,000
8402227 System and method for committing results of a software transaction using a hardware transaction Mark S. Moir, Yosef Lev 2013-03-19 $25,886,000
8281185 Advice-based feedback for transactional execution David Dice, Martin Karlsson, Mark S. Moir 2012-10-02 $62,203,000
8239635 System and method for performing visible and semi-visible read operations in a software transactional memory Yosef Lev, Mark S. Moir 2012-08-07 $45,556,000
8225139 Facilitating transactional execution through feedback about misspeculation David Dice, Martin Karlsson, Mark S. Moir 2012-07-17 $31,820,000
8214833 Systems and methods for supporting software transactional memory using inconsistency-aware compilers and libraries Mark S. Moir 2012-07-03 $45,931,000
7966459 System and method for supporting phased transactional memory modes Mark S. Moir 2011-06-21 $54,529,000
7945912 Hierarchical queue-based locks Nir N. Shavit, Victor M. Luchangco 2011-05-17 $27,891,000
7779165 Scalable method for producer and consumer elimination Mark S. Moir, Ori Shalev, Nir N. Shavit 2010-08-17 $19,738,000
7496726 Controlling contention via transactional timers among conflicting transactions issued by processors operating in insistent or polite mode Victor M. Luchangco, Mark S. Moir, Ori Shalev, Nir N. Shavit 2009-02-24 $4,861,000
7353342 Shared lease instruction support for transient blocking synchronization Mark S. Moir, Nir N. Shavit, Guy L. Steele, Jr. 2008-04-01 $4,859,000
7346747 Exclusive lease instruction support for transient blocking synchronization Mark S. Moir, Nir N. Shavit, Guy L. Steele, Jr. 2008-03-18 $8,360,000