Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9529036 | Systems and methods for test time outlier detection and correction in integrated circuit testing | Gil Balog, Reed Linde | 2016-12-27 |
| 8945632 | Methods and compositions for inhibiting the nuclear factor κB pathway | Jacob GOPAS, Janet Ozer, Nadav Eisner, Adelbert Bacher, Wolfgang Eisenreich +2 more | 2015-02-03 |
| 8872538 | Systems and methods for test time outlier detection and correction in integrated circuit testing | Gil Balog, Reed Linde | 2014-10-28 |
| 8421494 | Systems and methods for test time outlier detection and correction in integrated circuit testing | Gil Balog, Reed Linde | 2013-04-16 |
| 8285752 | System and method for maintaining a plurality of summary levels in a single table | Alon Lubin, Nir Tzur, Yossi Kachlon | 2012-10-09 |
| 7969174 | Systems and methods for test time outlier detection and correction in integrated circuit testing | Gil Balog, Reed Linde | 2011-06-28 |
| 7528622 | Methods for slow test time detection of an integrated circuit during parallel testing | Gil Balog, Reed Linde | 2009-05-05 |
| 7208969 | Optimize parallel testing | — | 2007-04-24 |