Issued Patents All Time
Showing 26–50 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8680485 | Optical analysis method using the detection of a single light-emitting particle | — | 2014-03-25 |
| 8681332 | Method of measuring a diffusion characteristic value of a particle | Mitsushiro Yamaguchi | 2014-03-25 |
| 8541759 | Optical analysis device, optical analysis method and computer program for optical analysis | Mitsushiro Yamaguchi, Seiji Kondo, Kunio Hori | 2013-09-24 |
| 8530165 | Nucleic acid detection method for determining if one or more analyte nucleotides are present in a nucleic acid | — | 2013-09-10 |
| 8471220 | Optical analysis device, optical analysis method and computer program for optical analysis | Mitsushiro Yamaguchi, Seiji Kondo, Kunio Hori | 2013-06-25 |
| 8236498 | Method of detecting nucleotide sequence with an intramolecular probe | Nobuhiko Morimoto | 2012-08-07 |
| 8106310 | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board | Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata | 2012-01-31 |
| 8024155 | Sample data reliability evaluation method and sample data reliability evaluation apparatus | Shinya Ogiwara | 2011-09-20 |
| 7999194 | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board | Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata | 2011-08-16 |
| 7846696 | Method for estimating target nucleic acid ratio | — | 2010-12-07 |
| 7795542 | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board | Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata | 2010-09-14 |
| 7688649 | Semiconductor memory device with debounced write control signal | Noriyoshi Sato, Nobutaka Nasu | 2010-03-30 |
| 7178234 | Method of manufacturing multi-layer printed circuit board | Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata | 2007-02-20 |
| 6975548 | Memory device having redundant memory cell | — | 2005-12-13 |
| 6930258 | Multilayer printed wiring board and method of producing multilayer printed wiring board | Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata | 2005-08-16 |
| 6868021 | Rapidly testable semiconductor memory device | Nobutaka Nasu | 2005-03-15 |
| 6522563 | Semiconductor memory with built-in cache | Yasuhiro Tanaka, Satoru Tanoi | 2003-02-18 |
| 6510070 | Semiconductor memory with built-in cache | Yasuhiro Tanaka, Satoru Tanoi | 2003-01-21 |
| 6441665 | Semiconductor integrated circuit | Shuichi Hashidate, Shinichi Fukuzako | 2002-08-27 |
| 6362989 | Semiconductor memory with built-in cache | Yasuhiro Tanaka, Satoru Tanoi | 2002-03-26 |
| 6320778 | Semiconductor memory with built-in cache | Yasuhiro Tanaka, Satoru Tanoi | 2001-11-20 |
| 6249450 | Semiconductor memory with built-in cache | Yasuhiro Tanaka, Satoru Tanoi | 2001-06-19 |
| 6195771 | Semiconductor device having semiconductor memory circuit to be tested, method of testing semiconductor memory circuit and read circuit for semiconductor memory circuit | Satoru Tanoi, Yasuhiro Tokunaga | 2001-02-27 |
| 6052330 | Semiconductor memory with arbitrary data masking | — | 2000-04-18 |
| 6011709 | Semiconductor memory with built-in cache | Yasuhiro Tanaka, Satoru Tanoi | 2000-01-04 |