Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9262837 | PCIE clock rate stepping for graphics and platform processors | Anthony Michael Tamasi, Colyn S. Case, David G. Reed | 2016-02-16 |
| 9069990 | Secure information storage system and method | — | 2015-06-30 |
| 8516165 | System and method for encoding packet header to enable higher bandwidth efficiency across bus links | — | 2013-08-20 |
| 8458370 | Method and system for supporting multiple display interface standards | Luc Bisson, Vishal Lulla | 2013-06-04 |
| 8432019 | Techniques for capacitively coupling signals with an integrated circuit | William B. Simms | 2013-04-30 |
| 7991939 | Dummy accesses to ensure CPU exits lower-power state | Ashish Kaul | 2011-08-02 |
| 7885062 | Computer chassis with partitions for improved airflow | Barry A. Wagner, Don Le | 2011-02-08 |
| 7788439 | Asymmetrical bus for bus link width optimization of a graphics system | Colyn S. Case | 2010-08-31 |
| 7705850 | Computer system having increased PCIe bandwidth | — | 2010-04-27 |
| 7694062 | System and apparatus for capacitively coupling signals with an integrated circuit | William B. Simms | 2010-04-06 |
| 7526593 | Packet combiner for a packetized bus with dynamic holdoff time | Manas Mandal, Colyn S. Case, Ashish Kaul | 2009-04-28 |
| 7469311 | Asymmetrical bus | Colyn S. Case | 2008-12-23 |
| 7426597 | Apparatus, system, and method for bus link width optimization of a graphics system | Luc Bisson, Oren Rubinstein, Wei-Je Huang, Michael B. Diamond | 2008-09-16 |