WD

William J. Dally

NV NVIDIA: 91 patents #9 of 7,811Top 1%
MIT: 34 patents #64 of 9,367Top 1%
RA Rambus: 23 patents #89 of 549Top 20%
Stanford University: 16 patents #86 of 5,197Top 2%
AS Avici Systems: 16 patents #2 of 7Top 30%
VC Velio Communications: 6 patents #1 of 8Top 15%
LS Lsi: 5 patents #274 of 1,740Top 20%
Futurewei Technologies: 4 patents #427 of 1,563Top 30%
MT Mips Technologies: 3 patents #46 of 129Top 40%
CL Calos Fund Limited Liability: 3 patents #5 of 16Top 35%
Lsi Logic: 3 patents #574 of 1,957Top 30%
IN Intel: 3 patents #10,349 of 30,777Top 35%
CR Cray: 2 patents #62 of 150Top 45%
Caltech: 1 patents #2,143 of 4,321Top 50%
UE U.S. Department Of Energy: 1 patents #118 of 559Top 25%
AT AT&T: 1 patents #10,626 of 18,772Top 60%
SU Sunpower: 1 patents #299 of 453Top 70%
📍 Incline Village, NV: #3 of 156 inventorsTop 2%
🗺 Nevada: #18 of 8,397 inventorsTop 1%
Overall (All Time): #3,104 of 4,157,543Top 1%
207
Patents All Time

Issued Patents All Time

Showing 126–150 of 207 patents

Patent #TitleCo-InventorsDate
7782138 Signaling system with low-power automatic gain control John W. Poulton 2010-08-24
7760747 Apparatus and method for packet scheduling Philip P. Carvey, Paul A. Beliveau, William F. Mann, Larry Robert Dennison 2010-07-20
7715494 Digital transmitter 2010-05-11
7707384 System and method for re-ordering memory references for access to memory Scott Rixner 2010-04-27
7706464 Digital transmitter 2010-04-27
7683680 Combined phase comparator and charge pump circuit Ramin Farjad-Rad, Teva J. Stone, Xiaoying Yu, John W. Poulton 2010-03-23
7668890 Prefix search circuitry and method Gregory M. Waters, Larry Robert Dennison, Philip P. Carvey, William F. Mann 2010-02-23
7633940 Load-balanced routing Arjun Singh 2009-12-15
7627069 Digital transmit phase trimming 2009-12-01
7602857 Digital transmitter 2009-10-13
7602858 Digital transmitter 2009-10-13
7580474 Digital transmitter 2009-08-25
7564920 Digital transmitter 2009-07-21
7529915 Context switching processor with multiple context control register sets including write address register identifying destination register for waiting context to store returned data from external source Robert Gelinas, W. Patrick Hays, Sol Katzman 2009-05-05
7526046 Digital transmitter 2009-04-28
7498882 Signaling system with low-power automatic gain control John W. Poulton 2009-03-03
7495513 Signaling system with low-power automatic gain control John W. Poulton 2009-02-24
7489739 Method and apparatus for data recovery 2009-02-10
7460565 Data communications circuit with multi-stage multiplexing John W. Poulton 2008-12-02
7414489 Phase controlled oscillator circuit with input signal coupler Ramin Farjad-Rad, John W. Poulton, Thomas Hastings Greer, III, Hiok-Tiaq Ng, Teva J. Stone 2008-08-19
7408959 Method and apparatus for ensuring cell ordering in large capacity switching systems and for synchronizing the arrival time of cells to a switch fabric Martin Braff, Gopalakrishnan Ramamurthy 2008-08-05
7401205 High performance RISC instruction set digital signal processor having circular buffer and looping controls W. Patrick Hays, Robert Gelinas, Sol Katzman, Sam Rosen, Staffan Ericsson 2008-07-15
7301941 Multistage digital cross connect with synchronized configuration switching 2007-11-27
7292580 Method and system for guaranteeing quality of service in a multi-plane cell switch Gopalakrishnan Ramamurthy, Gopalakrishnan Meempat 2007-11-06
7292594 Weighted fair share scheduler for large input-buffered high-speed cross-point packet/cell switches Gopalakrishnan Meempat, Gopalakrishnan Ramamurthy 2007-11-06