{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Mips Technologies", "item": "https://www.patentleaderboard.com/company/mips-technologies"}, {"@type": "ListItem", "position": 3, "name": "W. Patrick Hays", "item": "https://www.patentleaderboard.com/inventor/fl:w._ln:hays-1"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
WH

W. Patrick Hays — 11 Patents

MTMips Technologies: 6 patents #33 of 129Top 30%
NVIDIA: 3 patents #2,179 of 7,811Top 30%
Intel: 1 patents #18,326 of 30,777Top 60%
Cambridge, MA: #1,027 of 8,183 inventorsTop 15%
Massachusetts: #11,676 of 88,656 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
W. Patrick Hays has been granted 11 US patents while listed as an inventor at Mips Technologies. The first was granted in 1999 and the most recent in January 2022. W. Patrick Hays ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list W. Patrick Hays in Cambridge, MA, US.

Patents per Year

Patents granted per year, 1999 to 2022Bar chart with a peak of 1 patents in 1999.peak 11999: 1 patents19992003: 1 patents2006: 1 patents20062007: 1 patents2008: 1 patents20082009: 1 patents2011: 1 patents20112012: 1 patents2015: 1 patents20152016: 1 patents2022: 1 patents2022

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11226820 Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch Robert Gelinas, Sol Katzman, William J. Dally 2022-01-18
9519507 Executing an instruction of currently active thread before context switch upon receiving inactive context ID to be activated Robert Gelinas, Sol Katzman, William J. Dally 2016-12-13
9047093 Data transfer bus communication to receive data by sending request instruction attached with identifier indicating processor and thread context identities Robert Gelinas, Sol Katzman, William J. Dally 2015-06-02
8209522 System and method for extracting fields from packets having fields spread over more than one register Sol Katzman, Robert Gelinas 2012-06-26 $4,986,000
7895423 Method for extracting fields from packets having fields spread over more than one register Sol Katzman, Robert Gelinas 2011-02-22 $8,892,000
7529915 Context switching processor with multiple context control register sets including write address register identifying destination register for waiting context to store returned data from external source Robert Gelinas, Sol Katzman, William J. Dally 2009-05-05 $1,452,000
7401205 High performance RISC instruction set digital signal processor having circular buffer and looping controls William J. Dally, Robert Gelinas, Sol Katzman, Sam Rosen, Staffan Ericsson 2008-07-15 $1,829,000
7162615 Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch Robert Gelinas, Sol Katzman, William J. Dally 2007-01-09 $1,833,000
7039060 System and method for extracting fields from packets having fields spread over more than one register Sol Katzman, Robert Gelinas 2006-05-02
6651160 Register set extension for compressed instruction set 2003-11-18 $1,837,000
5926644 Instruction formats/instruction encoding 1999-07-20 $113,655,000