Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10613996 | Separating completion and data responses for higher read throughput and lower link utilization in a data processing network | Phanindra Kumar Mannava, Bruce James Mathewson, Jamshed Jalal, Klas Magnus Bruce | 2020-04-07 |
| 10585449 | Clock circuitry for functionally safe systems | Ramamoorthy Guru Prasadh, Amaresh Pangal, Kishore Kumar Jagadeesha, Mark David Werkheiser | 2020-03-10 |
| 10489315 | Dynamic adaptation of direct memory transfer in a data processing system with mismatched data-bus widths | Jamshed Jalal, Phanindra Kumar Mannava, Mark David Werkheiser, Ramamoorthy Guru Prasadh, Gurunath Ramagiri | 2019-11-26 |
| 10452575 | System, method and apparatus for ordering logic | Jamshed Jalal, Mark David Werkheiser, Glenn Allan Canto, Ashok Kumar Tummala, Devi Sravanthi Yalamarthy | 2019-10-22 |
| 10452593 | High-performance streaming of ordered write stashes to enable optimized data sharing between I/O masters and CPUs | Jamshed Jalal, Ashok Kumar Tummala, Gurunath Ramagiri | 2019-10-22 |
| 10042766 | Data processing apparatus with snoop request address alignment and snoop response time alignment | Jamshed Jalal, Klas Magnus Bruce, Phanindra Kumar Mannava | 2018-08-07 |
| 9900260 | Efficient support for variable width data channels in an interconnect network | Ramamoorthy Guru Prasadh, Jamshed Jalal, Ashok Kumar Tummala, Phanindra Kumar Mannava | 2018-02-20 |
| 8219754 | Context instruction cache architecture for a digital signal processor | Abhijit Giri | 2012-07-10 |
| 7200173 | Method and apparatus for generating a distortionless pulse width modulated waveform | Sourav Roy | 2007-04-03 |