Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393400 | Block matching between first data and second data | John Brothers, Metin Gokhan Ünal, Rune Holm | 2025-08-19 |
| 12339855 | Data stream processor | Damian Piotr Modrzyk, Metin Gokhan Ünal, Giacomo Gabrielli | 2025-06-24 |
| 12277420 | Masked-vector-comparison instruction | Jacob Eapen, Matthias Lothar Boettcher, François Christopher Jacques Botman | 2025-04-15 |
| 12260221 | Circuitry and method for instruction execution in dependence upon trigger conditions | Mbou Eyole, Giacomo Gabrielli | 2025-03-25 |
| 12045622 | Input channel processing for triggered-instruction processing element | Matthew James Walker, Mbou Eyole, Giacomo Gabrielli | 2024-07-23 |
| 11977896 | Issuing a sequence of instructions including a condition-dependent instruction | Matthew James Walker, Mbou Eyole, Giacomo Gabrielli, Wei Wang | 2024-05-07 |
| 11966739 | Processing of issued instructions | Matthew James Walker, Mbou Eyole, Giacomo Gabrielli | 2024-04-23 |
| 11494256 | Memory scanning operation in response to common mode fault signal | Milosch Meriac, Emre Ozer, Xabier Iturbe, Shidhartha Das | 2022-11-08 |
| 11263073 | Error recovery for intra-core lockstep mode | Matthias Lothar Boettcher, Mbou Eyole | 2022-03-01 |
| 11176012 | Device, system and process for redundant processor error detection | Emre Ozer, Xabier Iturbe | 2021-11-16 |
| 11113164 | Handling errors in buffers | Matthias Lothar Boettcher, Mbou Eyole | 2021-09-07 |
| 11022649 | Stabilised failure estimate in circuits | Reiley Jeyapaul | 2021-06-01 |
| 10817369 | Apparatus and method for increasing resilience to faults | Reiley Jeyapaul, Xabier Iturbe, Emre Ozer, Antony John Penton | 2020-10-27 |
| 10810094 | Methods and apparatus for anomaly response | Milosch Meriac, Xabier Iturbe, Emre Ozer, Shidhartha Das | 2020-10-20 |
| 10747601 | Failure estimation in circuits | Reiley Jeyapaul | 2020-08-18 |
| 10657010 | Error detection triggering a recovery process that determines whether the error is resolvable | Xabier Iturbe, Emre Ozer | 2020-05-19 |
| 10628277 | Device, system and process for redundant processor error detection | Emre Ozer, Xabier Iturbe | 2020-04-21 |
| 10523186 | Vulnerability determination in circuits | Reiley Jeyapaul, Xabier Iturbe, Matthew James Horsnell, David Michael Gilday | 2019-12-31 |
| 10331531 | Self-testing in a processor core | Kauser Yakub Johar, Marco Bonino | 2019-06-25 |
| 10303566 | Apparatus and method for checking output data during redundant execution of instructions | Emre Ozer, Xabier Iturbe, Antony John Penton | 2019-05-28 |
| 10289332 | Apparatus and method for increasing resilience to faults | Xabier Iturbe, Emre Ozer, Antony John Penton | 2019-05-14 |
| 10185635 | Targeted recovery process | Xabier Iturbe, Emre Ozer | 2019-01-22 |
| 10108486 | Error protection | Emre Ozer | 2018-10-23 |