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Yosuke Miyoshi — 11 Patents

Nec: 7 patents #2,009 of 14,502Top 15%
NDNec Compound Semiconductor Devices: 4 patents #2 of 87Top 3%
ANAnelva: 3 patents #57 of 280Top 25%
UNUnknown: 2 patents #12,644 of 83,584Top 20%
Tokyo, JP: #14,217 of 90,295 inventorsTop 20%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Yosuke Miyoshi has been granted 11 US patents while listed as an inventor at Nec. The first was granted in 1999 and the most recent in August 2005. Yosuke Miyoshi ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Yosuke Miyoshi in Tokyo, JP.

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6924201 Heterojunction bipolar transistor and method of producing the same Masahiro Tanomura, Hidenori Shimawaki, Fumio Harima 2005-08-02 $23,000
6723664 Method and apparatus for depositing a thin film, and semiconductor device having a semiconductor-insulator junction Hideki Matsumura, Akira Izumi, Atsushi Masuda, Yasunobu Nashimoto, Shuji Nomura +2 more 2004-04-20 $41,000
6717192 Schottky gate field effect transistor — 2004-04-06 $36,000
6483135 Field effect transistor Masashi Mizuta, Masaaki Kuzuhara, Yasunobu Nashimoto, Kazunori Asano, Yasunori Mochizuki 2002-11-19 $11,000
6462362 Heterojunction bipolar transistor having prevention layer between base and emitter — 2002-10-08 $8,000
6349669 Method and apparatus for depositing a thin film, and semiconductor device having a semiconductor-insulator junction Hideki Matsumura, Akira Izumi, Atsushi Masuda, Yasunobu Nashimoto, Shuji Nomura +2 more 2002-02-26 $29,000
6325857 CVD apparatus — 2001-12-04 $41,000
6225241 Catalytic deposition method for a semiconductor surface passivation film — 2001-05-01 $39,000
6100571 Fet having non-overlapping field control electrode between gate and drain Masashi Mizuta, Masaaki Kuzuhara, Yasunobu Nashimoto, Kazunori Asano, Yasunori Mochizuki 2000-08-08 $70,000
6069094 Method for depositing a thin film Hideki Matsumura, Akira Izumi, Atsushi Masuda, Yasunobu Nashimoto, Shuji Nomura +2 more 2000-05-30 $87,000
5942792 Compound semiconductor device having a multilayer silicon structure between an active region and insulator layer for reducing surface state density at interface — 1999-08-24 $23,000

Nearby-Ranked Inventors

Ya-Ching Chang11
Hermann Lubbert11
Alexander WAITE11
Mehrad Mehr11
Matthew J. Purdey11
Nishtha Madaan11
Ian C. Richards11
Chad Huffman11
Lifeng Fan11