Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6531749 | Field effect transistor having a two layered gate electrode | Takeo Matsuki | 2003-03-11 |
| 6495438 | Titanium polycide gate electrode and method of forming a titanium polycide gate electrode of a semiconductor device | — | 2002-12-17 |
| 6440828 | Process of fabricating semiconductor device having low-resistive contact without high temperature heat treatment | Shunichiro Sato, Yoshiaki Yamada, Tetsuya Taguwa, Koji Urabe | 2002-08-27 |
| 6358846 | Method of fabricating semiconductor device with polycide gate structure | — | 2002-03-19 |
| 6281052 | Method of manufacturing semiconductor device | — | 2001-08-28 |
| 6113750 | Method of forming thin metal films | Hiroaki Yamada, Toshiyuki Ohta | 2000-09-05 |
| 6030511 | Collimated sputtering method and system used therefor | — | 2000-02-29 |
| 5985756 | Method of forming an interconnection in a contact hole in an insulation layer over a silicon substrate | — | 1999-11-16 |
| 5850356 | Simulation apparatus for optimizing sputtering apparatus and simulation method therefor | Hiroaki Yamada, Toshiyuki Ohta | 1998-12-15 |
| 5815684 | Configuration simulating method employing string model for simulating layer configuration of silicon wafer | Toshiyuki Ohta, Hiroaki Yamada | 1998-09-29 |
| 5744016 | Sputtering apparatus | Yoshiaki Yamada | 1998-04-28 |