Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6434722 | Method of changing logic circuit portion into gated clock portion and recording medium storing a program for carrying out the method | Takuo Nakaki | 2002-08-13 |
| 6009248 | Delay optimization system to conduct optimization for satisfying delay constraints on the circuit and method therefor | Koichi Sato, Hideyuki Emura, Naotaka Maeda | 1999-12-28 |
| 5883808 | Logic circuit optimization apparatus and its method | — | 1999-03-16 |