Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE41496 | Boundary-scan input circuit for a reset pin | Thomas L. Langford, II | 2010-08-10 |
| 7468754 | High-definition de-interlacing and frame doubling circuit and method | Eric Stephen Carlsgaard, Michael Evan Crabb | 2008-12-23 |
| 7031206 | Digital line delay using a single port memory | Paul D. Filliman, Michael Dwayne Knox | 2006-04-18 |
| 6894726 | High-definition de-interlacing and frame doubling circuit and method | Eric Stephen Carlsgaard, Michael Evan Crabb | 2005-05-17 |
| 6839779 | Counting a number of occurrences of a first RTS (ready to send) and a first RTR (ready to receive) signals for limiting a data transfer bandwidth through handshake suppression | Didier Velez | 2005-01-04 |
| 6741436 | Microprocessor-controlled DC to DC converter with fault protection | Stephen K. Gilbert, Qlingchuan Li | 2004-05-25 |
| 5546592 | System and method for incrementing memory addresses in a computer system | — | 1996-08-13 |
| 5432854 | Stereo FM receiver, noise control circuit therefor | Kazunari Honjo | 1995-07-11 |
| 5423050 | Intermodule test across system bus utilizing serial test bus | Mark A. Taylor, Chris Harrison, Larry C. James | 1995-06-06 |
| 5377198 | JTAG instruction error detection | Mark A. Taylor | 1994-12-27 |
| 5347520 | Boundary-scan enable cell with non-critical enable path | Wilson E. Smoak | 1994-09-13 |
| 5343478 | Computer system configuration via test bus | Larry C. James, Carl W. Kagy, Jeffrey F. Gates, Jeffrey A. Hawkey, Thomas F. Heil | 1994-08-30 |
| 5325368 | JTAG component description via nonvolatile memory | Larry C. James, Mark A. Taylor, Chris Harrison | 1994-06-28 |
| 5319646 | Boundary-scan output cell with non-critical enable path | Wilson E. Smoak | 1994-06-07 |
| 5313470 | Boundary-scan input cell for a clock pin | — | 1994-05-17 |
| 5267191 | FIFO memory system | — | 1993-11-30 |
| 5260948 | Bidirectional boundary-scan circuit | Edward W. Hutton, Jr. | 1993-11-09 |
| 5260950 | Boundary-scan input circuit for a reset pin | Thomas L. Langford, II | 1993-11-09 |
| 4933894 | Circuit and method for adding binary numbers with a difference of one or less | — | 1990-06-12 |