Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7102188 | High reliability electrically erasable and programmable read-only memory (EEPROM) | Thierry Coffi Herve Yao, Greg Scott, Pierre Gassot | 2006-09-05 |
| 6437839 | Liquid crystal on silicon (LCOS) display pixel with multiple storage capacitors | — | 2002-08-20 |
| 6373543 | Process for forming silicon LC pixel cell having planar alignment layers of uniform thickness | — | 2002-04-16 |
| 6313901 | Liquid crystal display fabrication process using a final rapid thermal anneal | — | 2001-11-06 |
| 5899714 | Fabrication of semiconductor structure having two levels of buried regions | Douglas Robert Farrenkopf, Richard B. Merrill, Samar K. Saha, Kevin E. Brehmer, Kamesh V. Gadepally | 1999-05-04 |
| 5894147 | Memory transistor having underlapped floating gate | — | 1999-04-13 |
| 5889315 | Semiconductor structure having two levels of buried regions | Douglas Robert Farrenkopf, Richard B. Merrill, Samar K. Saha, Kevin E. Brehmer, Kamesh V. Gadepally | 1999-03-30 |
| 5591658 | Method of fabricating integrated circuit chip containing EEPROM and capacitor | — | 1997-01-07 |
| 5550072 | Method of fabrication of integrated circuit chip containing EEPROM and capacitor | Jeffrey Robert Perry, Narasimha Kaushik Narahari | 1996-08-27 |
| 5108939 | Method of making a non-volatile memory cell utilizing polycrystalline silicon spacer tunnel region | Martin H. Manley, Michael J. Hart | 1992-04-28 |