DG

Daniel W. Green

NS National Semiconductor: 14 patents #114 of 2,238Top 6%
ST Sealy Technology: 5 patents #16 of 104Top 20%
VI Via-Cyrix: 5 patents #1 of 30Top 4%
DP Defendtex Pty: 1 patents #3 of 7Top 45%
ML Metal Storm Limited: 1 patents #6 of 9Top 70%
PM Pega Medical: 1 patents #4 of 10Top 40%
Overall (All Time): #128,584 of 4,157,543Top 4%
29
Patents All Time

Issued Patents All Time

Showing 25 most recent of 29 patents

Patent #TitleCo-InventorsDate
12398774 Open coil spring assemblies Larry K. DeMoss, Brian M. Manuszak, Kevin Tar, Darin T. Thomas, Morrison J. Just 2025-08-26
12398775 Open coil spring assemblies Larry K. DeMoss, Brian M. Manuszak, Kevin Tar, Darin T. Thomas, Morrison J. Just 2025-08-26
12385542 Open coil spring assemblies Larry K. DeMoss, Brian M. Manuszak, Kevin Tar, Darin T. Thomas, Morrison J. Just 2025-08-12
12135066 Open coil spring assemblies Larry K. DeMoss, Brian M. Manuszak, Kevin Tar, Darin T. Thomas, Morrison J. Just 2024-11-05
11608869 Open coil spring assemblies Larry K. DeMoss, Brian M. Manuszak, Darin T. Thomas, Kevin Tar, Morrison J. Just 2023-03-21
11480228 Open coil spring assemblies Larry K. DeMoss, Brian M. Manuszak, Kevin Tar, Darin T. Thomas, Morrison J. Just 2022-10-25
9677837 Stacked projectile launcher and associated methods 2017-06-13
8783155 Stacked projectile launcher and associate methods 2014-07-22
8029507 Orthopedic method for correcting angular bone deformity Joseph L. Molino 2011-10-04
7895418 Operand queue for use in a floating point unit to reduce read-after-write latency and method operation 2011-02-22
7785326 System for intramedullary rod fixation and method therefor Joseph L. Molino 2010-08-31
7113969 Formatting denormal numbers for processing in a pipelined floating point unit Atul Dhablania, Jeffrey A. Lohman 2006-09-26
7024444 Split multiplier array and method of operation 2006-04-04
6970996 Operand queue for use in a floating point unit to reduce read-after-write latency and method of operation 2005-11-29
6801924 Formatting denormal numbers for processing in a pipelined floating point unit Atul Dhablania, Jeffrey A. Lohman 2004-10-05
6757812 Leading bit prediction with in-parallel correction Atul Dhablania, Jeffrey A. Lohman, Bang-Thu Nguyen 2004-06-29
6721772 Rounding denormalized numbers in a pipelined floating point unit without pipeline stalls Atul Dhablania 2004-04-13
6598064 Split multiplier array and method of operation 2003-07-22
6490606 Rounding denormalized numbers in a pipelined floating point unit without pipeline stalls Atul Dhablania 2002-12-03
6405232 Leading bit prediction with in-parallel correction Atul Dhablania, Jeffrey A. Lohman, Bang-Thu Nguyen 2002-06-11
6351789 Built-in self-test circuit and method for validating an associative data array 2002-02-26
6351797 Translation look-aside buffer for storing region configuration bits and method of operation Douglas R. Beard, Darren Bensley 2002-02-26
6301647 Real mode translation look-aside buffer and method of operation 2001-10-09
6065091 Translation look-aside buffer slice circuit and method of operation 2000-05-16
6044478 Cache with finely granular locked-down regions 2000-03-28