Issued Patents All Time
Showing 25 most recent of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10629161 | Automatic multi-clock circuit generation | Hojin Kee, Adrian P. Deac, Adam T. Arnesen | 2020-04-21 |
| 10367525 | Incremental loop modification for LDPC encoding | David C. Uliana, Newton G. Petersen, Hojin Kee, Adam T. Arnesen, Dustyn K. Blasig +1 more | 2019-07-30 |
| 10331361 | Self-addressing memory | Swapnil D. Mhaske, Hojin Kee, Adam T. Arnesen, David C. Uliana, Newton G. Petersen | 2019-06-25 |
| 10241764 | Automatically transform pass-by-value semantics into pass-by-reference implementation | Hojin Kee, David C. Uliana, Adam T. Arnesen | 2019-03-26 |
| 10216495 | Program variable convergence analysis | Taylor L. Riche, Newton G. Petersen, Hojin Kee, Adam T. Arnesen, Haoran Yi +1 more | 2019-02-26 |
| 10078456 | Memory system configured to avoid memory access hazards for LDPC decoding | Swapnil D. Mhaske, Hojin Kee, Adam T. Arnesen, David C. Uliana, Newton G. Petersen | 2018-09-18 |
| 9990250 | Single-IC LDPC encoding and decoding implementations | David C. Uliana, James W. McCoy, Newton G. Petersen, Hojin Kee, Adam T. Arnesen | 2018-06-05 |
| 9921815 | Program variable convergence analysis | Taylor L. Riche, Newton G. Petersen, Hojin Kee, Adam T. Arnesen, Haoran Yi +1 more | 2018-03-20 |
| 9898267 | Correlation analysis of program structures | Hojin Kee, Haoran Yi, Newton G. Petersen, James M. Lewis, Dustyn K. Blasig +2 more | 2018-02-20 |
| 9768805 | LPDC encoding techniques using a matrix representation | David C. Uliana, Newton G. Petersen, Qing-Hai Ruan, James C. Nagle, Swapnil D. Mhaske +2 more | 2017-09-19 |
| 9740411 | Configuring circuitry with memory access constraints for a program | Swapnil D. Mhaske, Hojin Kee, Adam T. Arnesen, David C. Uliana, Newton G. Petersen | 2017-08-22 |
| 9733911 | Value transfer between program variables using dynamic memory resource mapping | Hojin Kee, David C. Uliana, Adam T. Arnesen, Newton G. Petersen | 2017-08-15 |
| 9690550 | Program optimization via compile time execution | Hojin Kee, Newton G. Petersen, Jeffrey D. Washington, Haoran Yi, Dustyn K. Blasig | 2017-06-27 |
| 9569119 | Self-addressing memory | Swapnil D. Mhaske, Hojin Kee, Adam T. Arnesen, David C. Uliana, Newton G. Petersen | 2017-02-14 |
| 9489181 | Correlation analysis of program structures | Hojin Kee, Haoran Yi, Newton G. Petersen, James M. Lewis, Dustyn K. Blasig +2 more | 2016-11-08 |
| 9189215 | Convergence analysis of program variables | Taylor L. Riche, Newton G. Petersen, Hojin Kee, Adam T. Arnesen, Haoran Yi +1 more | 2015-11-17 |
| 9081583 | Compile time execution | Hojin Kee, Newton G. Petersen, Jeffrey D. Washington, Haoran Yi, Dustyn K. Blasig | 2015-07-14 |
| 8914761 | Metastability effects simulation for a circuit description | Ka Kei Kwok, Vijaya Vardhan Gupta, Lawrence Curtis Widdoes, Jr. | 2014-12-16 |
| 8438516 | Metastability effects simulation for a circuit description | Ka Kei Kwok, Vijaya Vardhan Gupta, Lawrence Curtis Widdoes, Jr. | 2013-05-07 |
| 8271918 | Formal verification of clock domain crossings | Ka Kei Kwok, Bing Li, Rojer Raji Sabbagh | 2012-09-18 |
| 7712062 | Metastability effects simulation for a circuit description | Ka Kie Kwok, Vijaya Vardhan Gupta, Lawrence Curtis Widdoes, Jr. | 2010-05-04 |
| RE40925 | Methods for automatically pipelining loops | David W. Knapp, Ronald A. Miller, Donald Benton MacMillen | 2009-09-29 |
| 7478028 | Method for automatically searching for functional defects in a description of a circuit | Chian-min Richard Ho, Robert Kristianto Mardjuki, David Lansing Dill, Jing Chyuarn Lin, Ping Fai Yeung +5 more | 2009-01-13 |
| 7454728 | Metastability injector for a circuit description | Ka Kei Kwok, Vijaya Vardhan Gupta, Ross Andrew Andersen, Ping Fai Yeung, Neil Hand +1 more | 2008-11-18 |
| 7356789 | Metastability effects simulation for a circuit description | Ka Kei Kwok, Vijaya Vardhan Gupta, Lawrence Curtis Widdoes, Jr. | 2008-04-08 |