Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9985105 | Method of manufacturing a PMOS transistor comprising a dual work function metal gate | Shin-Yu Nieh, Tieh-Chiang Wu, Wei-Ming Liao, Jei-Cheng Huang, Hai-Han Hung | 2018-05-29 |
| 8377632 | Method of reducing microloading effect | Yi-Nan Chen, Hsien-Wen Liu | 2013-02-19 |
| 8252684 | Method of forming a trench by a silicon-containing mask | Yi-Nan Chen, Hsien-Wen Liu | 2012-08-28 |
| 7569451 | Method of fabricating an isolation shallow trench | Jen-Jui Huang, Chang-Ho Yeh | 2009-08-04 |
| 6974741 | Method for forming shallow trench in semiconductor device | Tse-Yao Huang, Yi-Nan Chen | 2005-12-13 |