Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6925622 | System and method for correlated clock networks | — | 2005-08-02 |
| 5940779 | Architectural power estimation method and apparatus | Dinesh D. Gaitonde, Hongyu Xie, Dana Rigg | 1999-08-17 |
| 5774367 | Method of selecting device threshold voltages for high speed and low power | Daniel J. Snyder, Sleiman Chamoun, Karen S. Ramondetta | 1998-06-30 |
| 5740407 | Method of generating power vectors for circuit power dissipation simulation having both combinational and sequential logic circuits | Gary K. Yeap, Sean Tyler | 1998-04-14 |
| 5673420 | Method of generating power vectors for cell power dissipation simulation | Gary K. Yeap, James Patrick Garvey, II | 1997-09-30 |
| 5498988 | Low power flip-flop circuit and method thereof | Steven D. Millman, Sean Tyler | 1996-03-12 |