Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6674798 | Motion vector detecting device capable of accommodating a plurality of predictive modes | Kazuya Ishihara, Shinichi Nakagawa, Tetsuya Matsumura, Satoshi Kumaki, Atsuo Hanami | 2004-01-06 |
| 6320909 | Picture decoding and display unit including a memory having reduce storage capacity for storing pixel data | Akihiko Takabatake | 2001-11-20 |
| 6243032 | Decode apparatus that can accommodate dynamic change in sample data attribute during decoding process | Tetsuya Hara | 2001-06-05 |
| 5949486 | Unit for detecting motion vector for motion compensation | Kazuya Ishihara, Tetsuya Matsumura, Satoshi Kumaki, Atsuo Hanami, Shinichi Masuda | 1999-09-07 |
| 5850483 | Image decompressing apparatus with efficient image data transfer | Akihiko Takabatake, Takashi Hashimoto | 1998-12-15 |
| 5699117 | Moving picture decoding circuit | Akihiko Takabatake | 1997-12-16 |
| 5497340 | Apparatus and method for detecting an overflow when shifting N bits of data | Hideyuki Terane | 1996-03-05 |
| 5463340 | Phase clocked latch having both parallel and shunt connected switches for transmission gates | Akihiko Takabatake, Shinichi Nakagawa | 1995-10-31 |
| 5400087 | Motion vector detecting device for compensating for movements in a motion picture | Mitsuyoshi Suzuki, Akihiko Takabatake | 1995-03-21 |
| 5394355 | Read only memory for storing multi-data | Tetsuya Matsumura, Masahiko Yoshimoto, Kazuya Ishihara, Hiroshi Segawa | 1995-02-28 |
| 5379257 | Semiconductor integrated circuit device having a memory and an operational unit integrated therein | Tetsuya Matsumura, Hiroshi Segawa, Kazuya Ishihara, Masahiko Yoshimoto | 1995-01-03 |
| 5375079 | Arithmetical unit including accumulating operation | Kazuya Ishihara | 1994-12-20 |
| 5365475 | Semiconductor memory device usable as static type memory and read-only memory and operating method therefor | Tetsuya Matsumura, Masahiko Yoshimoto | 1994-11-15 |
| 5303353 | Data transfer system | Yoshinori Matsuura, Tetsuya Matsumura | 1994-04-12 |
| 5289406 | Read only memory for storing multi-data | Tetsuya Matsumura, Masahiko Yoshimoto, Kazuya Ishihara, Hiroshi Segawa | 1994-02-22 |
| 5253213 | Semiconductor memory used for changing sequence of data | Tetsuya Matsumura | 1993-10-12 |
| 5249146 | DCT/IDCT processor and data processing method | Yoshitsugu Inoue | 1993-09-28 |
| 5233233 | Multiplexer for use in a full adder having different gate delays | Yoshitsugu Inoue, Shinichi Nakagawa | 1993-08-03 |
| 5204962 | Processor with preceding operation circuit connected to output of data register | Hideyuki Terane | 1993-04-20 |
| 5204558 | Output buffer circuit and method of operation thereof with reduced power consumption | Satoshi Kumaki | 1993-04-20 |
| 5185538 | Output circuit for semiconductor integrated circuits having controllable load drive capability and operating method thereof | Harufusa Kondoh | 1993-02-09 |
| 5068818 | Hardware implemented moving average processor | Hideyuki Terane | 1991-11-26 |